Hardware Engineer

Hardware Engineer Design Jobs

4 jobs found

Today

Graphics Design Verification Engineer

Apple Austin, TX

Austin, TX

Today

Full time Design Design Verification E Verification

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Job Description

The Graphics Verification Engineer will support pre-silicon RTL verification for low power embedded graphics cores in Apple’s GPU design effort.

Responsibilities

Lead top-level verification for logic blocks within GPU designs
Run verification activities and report status against test plan items
Port and update SystemVerilog and UVM test bench components, including checkers and monitors
Create top-level tests to validate chip level features
Enable and maintain regression runs
Modify and maintain test benches and BFMs
Implement stimulus and perform coverage analysis
Debug simulation and silicon GPU failures
Partner with design and micro-architecture teams to align verification with functional goals
Develop scripts for software engineering flows

Requirements

BS required
Experience with Object Oriented Programming languages
Programming experience in C or C++
Experience with Verilog or other HDLs

Preferred Qualifications

Knowledge of GPU architectures
Understanding of CPU architectures
Familiarity with verification languages such as SystemVerilog/UVM/OVM
Familiarity with HDL simulators and waveform viewers including IES, VCS, DVE, Verdi
Understanding of constrained random verification, functional/code coverage, and assertion methodology
Familiarity with Perl, Shell scripting, Makefiles, TCL
Prior exposure to code repositories such as Perforce
Ability to work well on a team and learn from others

Tools & Technologies

SystemVerilog
Universal Verification Methodology (UVM)
Verilog
HDLs
C, C++
Perl
Shell scripting, Makefiles, TCL
IES, VCS, DVE, Verdi
Perforce

Location: Austin, TX (onsite)

Education: BS

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Today

Graphics Design Verification Engineer

Apple Austin, TX

Austin, TX

Today

Full time Design Verification Hardware Engineer Hardware Verification

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Job Description

The Graphics Design Verification Engineer supports pre-silicon verification for low power embedded graphics cores within Apple SoC/GPU design efforts. This role focuses on GPU design verification, building SystemVerilog and UVM-based test infrastructure, executing verification plans, and diagnosing simulation and silicon issues.

Responsibilities

Lead top-level verification for logic blocks in graphics processing unit (GPU) designs.
Write, execute, and track verification work against defined test plans.
Develop test bench components using SystemVerilog and UVM, including checkers and monitors.
Create top-level tests to validate chip-level features.
Enable and maintain regressions.
Write and maintain test benches and BFMs (bus functional models).
Generate stimulus and implement and analyze coverage.
Debug simulation and silicon failures related to GPU behavior.
Partner with design and micro-architecture teams to understand functional goals of the design.
Collaborate with multi-functional teams to coordinate verification activities across DV scopes.
Develop scripts for software engineering flows.

Required Qualifications

BS plus 3 years of relevant experience.
Background in CPU or GPU architectures.
Experience working with Verilog or other HDLs.
Experience with verification languages such as SystemVerilog, UVM, or OVM.
Experience using HDL simulators and waveform viewers including IES, VCS, DVE, and Verdi.

Preferred Qualifications

Experience working with GPU architectures.
Understanding of constrained random verification, functional/code coverage, and assertion methodology.
Experience developing UVM test bench components including checkers and monitors.
Familiarity with Perl, Shell scripting, Makefiles, and TCL.
Prior exposure to code repositories such as Perforce.
Ability to work well on a team collaborating with other teams.

Technology Stack

System Verilog
UVM
OVM
Verilog
IES, VCS, DVE, Verdi
Perl
Shell scripting, Makefiles, TCL
Perforce

Role Details

Location: Austin, TX (onsite)
Minimum experience: 3 years
Education: BS

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Today

Graphics Design Verification Engineer

Apple Austin, TX

Austin, TX

Today

Full time Design Tools Design Verification GPU

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Job Description

In Apple’s GPU design effort, this role centers on pre-silicon verification for low power embedded graphics cores. You will help ensure logic blocks are validated before hardware is built by leading verification execution, building robust test infrastructure, and driving root-cause work for both simulation and silicon failures.

What you’ll do

Lead top-level verification teams for logic blocks within graphics processing unit (GPU) designs.
Own the development, execution, and tracking of the team’s test plans.
Architect test bench methodology using Universal Verification Methodology (UVM) and System Verilog components.
Build testing stimulus, define coverage, and set up a regression strategy.
Own and maintain test benches and BFMs.
Debug simulation and silicon GPU failures.
Coordinate verification efforts through discussions with design and micro-architecture teams, plus other cross-functional teams.
Generate and present weekly status to the GPU leadership team.

What you bring

BS plus 10 years of relevant experience.
Background in CPU or GPU architectures.
Experience working with Verilog or other HDLs.
Experience architecting test benches with System Verilog and UVM/OVM.
Experience with constrained random verification, including functional and code coverage, and ad assertion methodology.
Experience debugging complex issues across design and verification environments.

Tools & technologies

Universal Verification Methodology (UVM), System Verilog
Verilog, OVM
IES, VCS, DVE, Verdi
Perl, Shell scripting, Makefiles, TCL

Preferred qualifications

Ability to manage multiple priorities under strict schedule deadlines.
Expertise in GPU architectures.
Experience with HDL simulators and waveform viewers including IES, VCS, DVE, Verdi.
Experience with Perl, Shell scripting, Makefiles, TCL.
Strong collaboration skills across teams with different technical disciplines.

Location: Austin, TX (onsite)

Experience: 10+ years

Education: BS

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Today

Lead RFIC Digital Designer

Lockheed Martin Moorestown, NJ

Moorestown, NJ

Today

$111k - $208k/yr Full time Analog Design Design Tools Digital Design

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Job Description

Lockheed Martin is seeking a Lead RFIC Digital Designer to own end-to-end physical design for mission-critical rotary mission systems within Rotary Mission Systems. This onsite role in Moorestown, NJ will focus on parasitic-aware, high-performance ASIC/IC layout execution using Cadence tools, while providing technical leadership across programs, foundry processes, and design teams.

Role Overview

You will serve as the technical lead responsible for the complete physical-design flow, starting at floorplanning and continuing through tape-out. The position spans complex full-custom digital, analog, and mixed-signal work, translating schematic intent into layout that meets performance targets while accounting for parasitics. The role also includes driving physical-verification closure across multiple foundries to support direct mission-critical delivery.

Key Responsibilities

Lead full-custom digital, analog, and mixed-signal design across multiple programs, including architectural design, RTL synthesis, floor-planning, place-and-route, and verification of digital and analog blocks.
Optimize area, device matching, signal integrity, and power delivery throughout the physical implementation flow.
Own the physical-design technical strategy for device generations spanning 130 nm to 12 nm, including high-voltage BCD processes, and drive layout methodology standardization across the department.
Lead technical teams, mentor staff engineers, and influence design direction across organizational boundaries.
Operate primarily with Cadence EDA tools and drive physical-verification closure across multiple foundries in support of mission-critical programs.
Own physical-verification closure using relevant checks to achieve sign-off across multiple foundry processes.

Required Qualifications

Bachelor’s degree or higher in Electrical Engineering, Electronics Technology, Microelectronics, or a related technical discipline.
Minimum 9 years of experience in full-custom digital or mixed-signal IC layout design.
Expert-level proficiency with Cadence Innovus and Cadence Virtuoso layout environments.
Experience with RTL coding using VHDL, Verilog, or System Verilog.
Layout experience across process nodes, including BCD technologies.
Experience driving physical-verification closure with test benches using DRC, LVS, ERC, and ANT for sign-off across multiple foundry processes.
Ability to obtain and maintain a DoD Secret clearance, requiring US citizenship.

Technologies

Cadence EDA tools
Cadence Innovus
Cadence Virtuoso
VHDL
Verilog
System Verilog
DRC, LVS, ERC, ANT

Desired Skills

Demonstrated experience as the physical-design or layout technical lead on a major effort, owning floorplan through tape-out of complex digital, analog, and mixed-signal ICs.
Layout experience with precision analog blocks such as PLLs, ADCs/DACs, LDOs, bandgap references, or amplifiers.
Experience owning tape-out sign-off packages and chairing physical-design review gates on concurrent programs.
Excellent verbal and written communication skills, including the ability to brief leadership, customers, and non-technical audiences.
Strong mentoring background with mid-career and staff-level layout engineers.
Successful proposal/capture contribution experience (BOE, technical-volume authoring, technical strategy) on major IC programs.
Previous experience related to aerospace or defense IC design techniques.

Compensation and Location

Location: Moorestown, NJ (onsite)
Salary: USD 110,500 - 208,344 per year

Benefits

Medical, Dental, Vision
Flexible work arrangements and schedules (e.g., 4x10)
401(k) match
Paid time off
Holidays
Parental Leave
EAP
Flexible Spending Accounts
Education Assistance
Life Insurance
Short-Term Disability
Long-Term Disability
Annual short-term and/or long-term incentive compensation programs may be offered depending on the position

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Hardware Engineer Design Jobs

Graphics Design Verification Engineer

Graphics Design Verification Engineer

Graphics Design Verification Engineer

Lead RFIC Digital Designer

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