Graphics Design Verification Engineer

The Graphics Verification Engineer will support pre-silicon RTL verification for low power embedded graphics cores in Apple’s GPU design effort.

Responsibilities

• Lead top-level verification for logic blocks within GPU designs
• Run verification activities and report status against test plan items
• Port and update SystemVerilog and UVM test bench components, including checkers and monitors
• Create top-level tests to validate chip level features
• Enable and maintain regression runs
• Modify and maintain test benches and BFMs
• Implement stimulus and perform coverage analysis
• Debug simulation and silicon GPU failures
• Partner with design and micro-architecture teams to align verification with functional goals
• Develop scripts for software engineering flows

Requirements

• BS required
• Experience with Object Oriented Programming languages
• Programming experience in C or C++
• Experience with Verilog or other HDLs

Preferred Qualifications

• Knowledge of GPU architectures
• Understanding of CPU architectures
• Familiarity with verification languages such as SystemVerilog/UVM/OVM
• Familiarity with HDL simulators and waveform viewers including IES, VCS, DVE, Verdi
• Understanding of constrained random verification, functional/code coverage, and assertion methodology
• Familiarity with Perl, Shell scripting, Makefiles, TCL
• Prior exposure to code repositories such as Perforce
• Ability to work well on a team and learn from others

Tools & Technologies

• SystemVerilog
• Universal Verification Methodology (UVM)
• Verilog
• HDLs
• C, C++
• Perl
• Shell scripting, Makefiles, TCL
• IES, VCS, DVE, Verdi
• Perforce

Location: Austin, TX (onsite)

Education: BS