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Lead RFIC Digital Designer

Lockheed Martin Moorestown, NJ

Moorestown, NJ

Today

$111k - $208k/yr Full time Analog Design Design Tools Digital Design

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Job Description

Lockheed Martin is seeking a Lead RFIC Digital Designer to own end-to-end physical design for mission-critical rotary mission systems within Rotary Mission Systems. This onsite role in Moorestown, NJ will focus on parasitic-aware, high-performance ASIC/IC layout execution using Cadence tools, while providing technical leadership across programs, foundry processes, and design teams.

Role Overview

You will serve as the technical lead responsible for the complete physical-design flow, starting at floorplanning and continuing through tape-out. The position spans complex full-custom digital, analog, and mixed-signal work, translating schematic intent into layout that meets performance targets while accounting for parasitics. The role also includes driving physical-verification closure across multiple foundries to support direct mission-critical delivery.

Key Responsibilities

Lead full-custom digital, analog, and mixed-signal design across multiple programs, including architectural design, RTL synthesis, floor-planning, place-and-route, and verification of digital and analog blocks.
Optimize area, device matching, signal integrity, and power delivery throughout the physical implementation flow.
Own the physical-design technical strategy for device generations spanning 130 nm to 12 nm, including high-voltage BCD processes, and drive layout methodology standardization across the department.
Lead technical teams, mentor staff engineers, and influence design direction across organizational boundaries.
Operate primarily with Cadence EDA tools and drive physical-verification closure across multiple foundries in support of mission-critical programs.
Own physical-verification closure using relevant checks to achieve sign-off across multiple foundry processes.

Required Qualifications

Bachelor’s degree or higher in Electrical Engineering, Electronics Technology, Microelectronics, or a related technical discipline.
Minimum 9 years of experience in full-custom digital or mixed-signal IC layout design.
Expert-level proficiency with Cadence Innovus and Cadence Virtuoso layout environments.
Experience with RTL coding using VHDL, Verilog, or System Verilog.
Layout experience across process nodes, including BCD technologies.
Experience driving physical-verification closure with test benches using DRC, LVS, ERC, and ANT for sign-off across multiple foundry processes.
Ability to obtain and maintain a DoD Secret clearance, requiring US citizenship.

Technologies

Cadence EDA tools
Cadence Innovus
Cadence Virtuoso
VHDL
Verilog
System Verilog
DRC, LVS, ERC, ANT

Desired Skills

Demonstrated experience as the physical-design or layout technical lead on a major effort, owning floorplan through tape-out of complex digital, analog, and mixed-signal ICs.
Layout experience with precision analog blocks such as PLLs, ADCs/DACs, LDOs, bandgap references, or amplifiers.
Experience owning tape-out sign-off packages and chairing physical-design review gates on concurrent programs.
Excellent verbal and written communication skills, including the ability to brief leadership, customers, and non-technical audiences.
Strong mentoring background with mid-career and staff-level layout engineers.
Successful proposal/capture contribution experience (BOE, technical-volume authoring, technical strategy) on major IC programs.
Previous experience related to aerospace or defense IC design techniques.

Compensation and Location

Location: Moorestown, NJ (onsite)
Salary: USD 110,500 - 208,344 per year

Benefits

Medical, Dental, Vision
Flexible work arrangements and schedules (e.g., 4x10)
401(k) match
Paid time off
Holidays
Parental Leave
EAP
Flexible Spending Accounts
Education Assistance
Life Insurance
Short-Term Disability
Long-Term Disability
Annual short-term and/or long-term incentive compensation programs may be offered depending on the position

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